Semiconductor memory device

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United States of America Patent

PATENT NO 9007809
APP PUB NO 20130301339A1
SERIAL NO

13778762

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Abstract

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A control circuit controls a voltage applied to a memory cell array. A first electrode contacts to a first surface of a variable resistance element, while a second electrode contacts to a second surface of the variable resistance element. The first electrode is configured by a metal, and the second electrode is configured by a P type semiconductor. The control unit, when performing a setting operation of a memory cell, applies a voltage such that a current flows in a direction from the first electrode toward the second electrode.

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Patent Owner(s)

  • TOSHIBA MEMORY CORPORATION

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fukumizu, Hiroyuki Yokohama, JP 52 461
Kobayashi, Shigeki Kuwana, JP 120 1030
Nojiri, Yasuhiro Yokohama, JP 27 262
Yamaguchi, Takeshi Yokkaichi, JP 383 3216
Yamato, Masaki Yokkaichi, JP 35 548

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