Semiconductor storage device and manufacturing method the same

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United States of America Patent

PATENT NO 9018611
APP PUB NO 20130248804A1
SERIAL NO

13601353

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Abstract

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A semiconductor storage device according to an embodiment includes a first conductive layer, a variable resistance layer, an electrode layer, a first liner layer, a stopper layer, and a second conductive layer. The variable resistance layer is provided above the first conductive layer. The electrode layer contacts an upper surface of the variable resistance layer. The first liner layer contacts the upper surface of the electrode layer. The stopper layer contacts the upper surface of the first liner layer. The second conductive layer is provided above the stopper layer. The first liner layer is made of a material having a property for canceling an influence of an orientation of a lower layer of the first liner layer, the property of the first liner layer being superior compared with that of the stopper layer.

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Patent Owner(s)

  • TOSHIBA MEMORY CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kawai, Murato Yokkaichi, JP 17 73

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