Techniques for accessing memory cells
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United States of America Patent
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Apr 28, 2015
Grant Date -
Oct 30, 2014
app pub date -
Jul 7, 2014
filing date -
Jan 24, 2008
priority date (Note) -
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Abstract
Techniques for accessing memory cells are disclosed. In one particular embodiment, the techniques may be realized as an apparatus providing voltage to a high impedance node of a memory cell. The apparatus may comprise a precharge switch coupled to a first voltage source node, a precharge capacitor coupled to the precharge switch, and a switch matrix coupled to the precharge capacitor, a second voltage source node, and the high impedance node of the memory cell. The precharge switch may be configured to decouple the precharge capacitor from the first voltage source node, and the switch matrix may be configured to decouple the second voltage source node from the high impedance node of the memory cell and to couple the precharge capacitor to the high impedance node of the memory cell.
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