Computer or microchip including a network portion with RAM memory erasable by a firewall-protected master controller
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United States of America Patent
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Apr 28, 2015
Grant Date -
Mar 27, 2014
app pub date -
Nov 27, 2013
filing date -
Nov 29, 1996
priority date (Note) -
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status (Latency Note)
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Abstract
A computer or microchip including a master controlling device, network communication components, one or more microprocessors and RAM, an internal hardware firewall located between a protected portion that is protected by the internal hardware firewall and a network portion. The internal hardware firewall denies access to at least the protected portion of the computer or microchip from the network. The firewall permits unrestricted access by the network to the network portion so that processing operations other than network communications and firewall operations conducted with the network are executed by microprocessors and RAM in the network portion. The master controlling device has preemptive control of the microprocessors and RAM in the network portion including erasure of at least a part of the random access memory (RAM) prior to the use of the network portion of the computer or microchip by the user or the operating system.
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