Semiconductor devices and methods of fabrication with reduced gate and contact resistances
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United States of America Patent
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May 12, 2015
Grant Date -
Dec 4, 2014
app pub date -
Jun 4, 2013
filing date -
Jun 4, 2013
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Abstract
Semiconductor structures with reduced gate and/or contact resistances and fabrication methods are provided. The method includes: providing a semiconductor device, which includes forming a transistor of the semiconductor device, where the transistor forming includes: forming a T-shaped gate for the transistor, the T-shaped gate being T-shaped in elevational cross-section; and forming an inverted-T-shaped contact to an active region of the transistor, the inverted-T-shaped contact including a conductive structure with an inverted T-shape in elevational cross-section.
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