Isolating, at least in part, local row or column circuitry of memory cell before establishing voltage differential to permit reading of cell

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United States of America Patent

PATENT NO 9030906
APP PUB NO 20140016406A1
SERIAL NO

13995230

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Abstract

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An embodiment may include local row and column circuitry that are local to a memory cell of a memory device. Either the local row circuitry or the local column circuitry may be electrically isolated, at least in part, from at least one remaining portion of the memory device during the establishing of a voltage differential between the local row circuitry and the local column circuitry that is to permit the memory cell to be read during a read of the memory cell. The read may occur subsequent to the establishing of the voltage differential. Many variations, modifications, and alternatives are possible without departing from this embodiment.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Damle, Prashant S Portland, US 32 259
Rivers, Doyle El Dorado Hills, US 28 176
Zeng, Raymond W Sunnyvale, US 23 366

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