Programmable clock spreading
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United States of America Patent
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May 12, 2015
Grant Date -
Sep 11, 2014
app pub date -
May 24, 2013
filing date -
Mar 6, 2013
priority date (Note) -
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Abstract
An integrated circuit having a programmable clock spreader configured to generate a plurality of controllably skewed clock signals, each applied to a corresponding region within the integrated circuit with circuitry configured to be triggered off the applied clock signal. The programmable clock spreader is designed to enable customization of the current-demand characteristics exhibited by the integrated circuit, e.g., based on the circuit's spectral impedance profile, to cause transient voltage droops in the power-supply network of the integrated circuit to be sufficiently small to ensure proper and reliable operation of the integrated circuit.
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