Minimizing power consumption for fixed-frequency processing unit operation
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United States of America Patent
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Jun 9, 2015
Grant Date -
Oct 10, 2013
app pub date -
Sep 12, 2012
filing date -
Apr 10, 2012
priority date (Note) -
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Abstract
A mechanism is provided for minimizing power consumption for operation of a fixed-frequency processing unit. A number of timeslots are counted in a time window where throttling is engaged to the fixed-frequency processing unit. The number of timeslots where throttling is engaged is divided by a total number of timeslots within the time window, thereby producing a performance loss (PLOSS) value. A determination is made as to whether determining whether the (PLOSS) value associated with the fixed-frequency processing unit is greater than an allowed performance loss (APLOSS) value. Responsive to the PLOSS value being less than or equal to the APLOSS value, a decrease in voltage supplied to the fixed-frequency processing unit is initiated.
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