Compliant printed circuit area array semiconductor device package
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United States of America Patent
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Jun 9, 2015
Issued Date -
N/A
app pub date -
May 27, 2010
filing date -
Jun 2, 2009
priority date (Note) -
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Abstract
An integrated circuit (IC) package for an IC device, and a method of making the same. The IC package includes an interconnect assembly with at least one printed compliant layer, a plurality of first contact members located along a first major surface, a plurality of second contact members located along a second major surface, and a plurality of printed conductive traces electrically coupling a plurality of the first and second contact members. The compliant layer is positioned to bias at least the first contact members against terminals on the IC device. Packaging substantially surrounds the IC device and the interconnect assembly. The second contact members are accessible from outside the packaging.
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