Systems and methods for gate aware iterative data processing
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United States of America Patent
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Jun 16, 2015
Grant Date -
Jan 23, 2014
app pub date -
Jul 18, 2012
filing date -
Jul 18, 2012
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Abstract
The present inventions are related to systems and methods for iterative data processing scheduling. In one case a data processing system is disclosed that includes a data detector circuit and a data decoder circuit. The data detector circuit is operable to apply a data detection algorithm to a data set to yield a detected output. The data decoder circuit is operable to repeatedly apply a data decoding algorithm to the detected output to yield a decoded output over a number of passes, where the number of passes is within an allowable number of local iterations selected based at least in part on a read gate signal.
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