Method and apparatus for improving processing performance of a multi-core processor

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United States of America Patent

PATENT NO 9063796
APP PUB NO 20140040904A1
SERIAL NO

13564804

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Abstract

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Managing task execution in a multi-core processor may be achieved by employing a spinlock and a multi-processor priority ceiling protocol. The spinlock may be employed to effect a dynamically enforceable mutual exclusion constraint. The multi-processor priority ceiling protocol may be employed to effect the dynamically enforceable mutual exclusion constraint to synchronize a plurality of tasks executing in the first and second processing cores of the multi-core processor.

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Patent Owner(s)

  • CARNEGIE MELLON UNIVERSITY;GM GLOBAL TECHNOLOGY OPERATIONS LLC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Giusto, Paolo Antioch, US 9 76
Lakshmanan, Karthik Pittsburgh, US 9 62
Rajkumar, Ragunathan Monroeville, US 8 289

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