Interface for storage device access over memory bus
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United States of America Patent
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Jun 23, 2015
Issued Date -
N/A
app pub date -
Nov 8, 2013
filing date -
May 19, 2011
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Abstract
A nonvolatile storage or memory device is accessed over a memory bus. The memory bus has an electrical interface typically used for volatile memory devices. A controller coupled to the bus sends synchronous data access commands to the nonvolatile memory device, and reads the response from the device bus based on an expected timing of a reply from the nonvolatile memory device. The controller determines the expected timing based on when the command was sent, and characteristics of the nonvolatile memory device. The controller may not need all the electrical signal lines available on the memory bus, and could issue data access commands to different groups of nonvolatile memory devices over different groups of electrical signal lines. The memory bus may be available and configured for either use with a memory controller and volatile memory devices, or a storage controller and nonvolatile memory devices.
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- 15 United States
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Patent Owner(s)
- INTEL CORPORATION
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- [Patents Count]
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Faber, Robert W | Hillsboro, US | 42 | 1457 |
Qawami, Shekoufeh | El Dorado Hills, US | 74 | 903 |
Sundaram, Rajesh | Folsom, US | 143 | 3171 |
Zimmerman, David J | El Dorado Hills, US | 32 | 868 |
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