Single package dual channel memory with co-support

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United States of America Patent

PATENT NO 9070423
SERIAL NO

14075020

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Abstract

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A microelectronic package can include a support element having first and second surfaces and substrate contacts at the first or second surface, zeroth and first stacked microelectronic elements electrically coupled with the substrate contacts, and terminals at the second surface electrically coupled with the microelectronic elements. The second surface can have a southwest region encompassing entire lengths of south and west edges of the second surface and extending in orthogonal directions from the south and west edges one-third of each distance toward north and east edges of the second surface, respectively. The terminals can include first terminals at a southwest region of the second surface, the first terminals configured to carry address information usable by circuitry within the microelectronic package to determine an addressable memory location from among all the available addressable memory locations of the memory storage arrays of at least one of the zeroth or first microelectronic elements.

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Patent Owner(s)

  • INVENSAS CORPORATION

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Yong Palo Alto, US 426 3487
Crisp, Richard Dewitt Hornitos, US 113 2738
Haba, Belgacem Saratoga, US 718 20815
Sun, Zhuowen Campbell, US 49 326
Zohni, Wael San Jose, US 152 2939

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