Refresh architecture and algorithm for non-volatile memories

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United States of America Patent

PATENT NO 9070473
SERIAL NO

13513139

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Abstract

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Methods and systems to refresh a non-volatile memory device, such as a phase change memory. In an embodiment, as a function of system state, a memory device performs either a first refresh of memory cells using a margined read reference level or a second refresh of error-corrected memory cells using a non-margined read reference level.

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Patent Owner(s)

  • MICRON TECHNOLOGY, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bedeschi, Ferdinando Milan, IT 217 1898
Gastaldi, Roberto Milan, IT 56 935

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