Utility and lifetime based cache replacement policy

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United States of America Patent

PATENT NO 9075746
APP PUB NO 20140089595A1
SERIAL NO

13992240

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Abstract

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Embodiments of the invention describe an apparatus, system and method for utilizing a utility and lifetime based cached replacement policy as described herein. For processors having one or more processor cores and a cache memory accessible via the processor core(s), embodiments of the invention describe a cache controller to determine, for a plurality of cache blocks in the cache memory, an estimated utility and lifetime of the contents of each cache block, the utility of a cache block to indicate a likelihood of use its contents, the lifetime of a cache block to indicate a duration of use of its contents. Upon receiving a cache access request resulting in a cache miss, said cache controller may select one of the cache blocks to be replaced based, at least in part, on one of the estimated utility or estimated lifetime of the cache block.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cai, Qiong Barcelona, ES 31 286
Falcon, Ayose J L'Hospitalet de Llobregat, ES 10 278
Hyuseinova, Nevin Barcelona, ES 9 96
Ozdemir, Serkan Barcelona, ES 9 93

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