SRAM local evaluation and write logic for column selection

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United States of America Patent

PATENT NO 9087563
APP PUB NO 20140063986A1
SERIAL NO

13604800

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Abstract

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An SRAM includes a first SRAM column having first SRAM cells and a first local evaluation logic coupled to a global bit line and a second SRAM column having second SRAM cells and a second local evaluation logic coupled to the same global bit line. The first SRAM column is selected with a first write line and the second SRAM column is selected with a second write line.

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Patent Owner(s)

  • GLOBALFOUNDRIES INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Freiburger, Peter T Rochester, US 12 22
Hebig, Travis R Rochester, US 52 218

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