Memory apparatus, systems, and methods
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United States of America Patent
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Jul 21, 2015
Grant Date -
Mar 7, 2013
app pub date -
Jul 31, 2012
filing date -
Aug 26, 2011
priority date (Note) -
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Abstract
Threshold voltages in a charge storage memory are controlled by threshold voltage placement, such as to provide more reliable operation and to reduce the influence of factors such as neighboring charge storage elements and parasitic coupling. Pre-compensation or post-compensation of threshold voltage for neighboring programmed aggressor memory cells reduces the threshold voltage uncertainty in a flash memory system. Using a buffer having a data structure such as a lookup table provides for programmable threshold voltage distributions that enables the distribution of data states in a multi-level cell flash memory to be tailored, such as to provide more reliable operation. Additional apparatus, systems, and methods are provided.
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