Non-planar quantum well device having interfacial layer and method of forming same

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United States of America Patent

PATENT NO 9087887
SERIAL NO

14060557

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Techniques are disclosed for forming a non-planar quantum well structure. In particular, the quantum well structure can be implemented with group IV or III-V semiconductor materials and includes a fin structure. In one example case, a non-planar quantum well device is provided, which includes a quantum well structure having a substrate (e.g. SiGe or GaAs buffer on silicon), a IV or III-V material barrier layer (e.g., SiGe or GaAs or AlGaAs), and a quantum well layer. A fin structure is formed in the quantum well structure, and an interfacial layer provided over the fin structure. A gate metal can be deposited across the fin structure. Drain/source regions can be formed at respective ends of the fin structure.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chau, Robert S Beaverton, US 514 18980
Le, Van H Beaverton, US 269 2810
Pillarisetty, Ravi Portland, US 449 7344
Rachmady, Willy Beaverton, US 425 5611

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