Method of producing precision vertical and horizontal layers in a vertical semiconductor structure
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United States of America Patent
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Jul 21, 2015
Grant Date -
Apr 17, 2014
app pub date -
Oct 8, 2013
filing date -
Sep 18, 2006
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Abstract
The present invention relates to providing layers of different thickness on vertical and horizontal surfaces (15, 20) of a vertical semiconductor device (1). In particular the invention relates to gate electrodes and the formation of precision layers (28) in semiconductor structures comprising a substrate (10) and an elongated structure (5) essentially standing up from the substrate. According to the method of the invention the vertical geometry of the device (1) is utilized in combination with either anisotropic deposition or anisotropic removal of deposited material to form vertical or horizontal layers of very high precision.
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