Integrated circuit packaging system with vertical interconnection and method of manufacture thereof
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jul 28, 2015
Grant Date -
Jun 14, 2012
app pub date -
Dec 10, 2010
filing date -
Dec 10, 2010
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A method of manufacture of an integrated circuit packaging system includes: providing a package substrate having a package substrate bottom side, a package substrate top side, and a package substrate window; mounting a base integrated circuit over the package substrate, the base integrated circuit having a base inactive side and a base active side facing the package substrate top side; attaching a lower internal connector to the base active side and the package substrate bottom side, the lower internal connector through the package substrate window; forming an upper insulation conformal to the base integrated circuit and the package substrate top side, the upper insulation having an upper insulation top side; and forming a peripheral through-insulation connector through the upper insulation, the peripheral through-insulation connector having a peripheral connector bottom side directly on the package substrate top side and a peripheral connector top side coplanar with the upper insulation top side.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully