Managing quiesce requests in a multi-processor environment

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United States of America Patent

PATENT NO 9104513
SERIAL NO

14211810

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Abstract

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Embodiments relate to managing quiesce requests in a multi-processor system. Aspects of the embodiments include receiving a quiesce request at a quiesce controller from a requesting processor, the requesting processor being one of a plurality of processors in a multi-processor system, and determining that the quiesce request is not accepted by the quiesce controller. Aspects also include, based on the quiesce request being not accepted by the quiesce controller, generating a reject message configured to indicate that the quiesce request has been rejected, holding the reject message until a quiesce command is broadcast to the multi-processor system, the quiesce command based on a different quiesce request, and sending the reject message to the requesting processor based on the broadcast of the quiesce command being detected by the quiesce controller.

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Patent Owner(s)

  • INTERNATIONAL BUSINESS MACHINES CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fee, Michael F Cold Spring, US 41 151
Postles, Dunn Berger Deanna Hyde Park, US 4 4

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