Memory device power managers and methods

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United States of America Patent

PATENT NO 9105323
APP PUB NO 20100191999A1
SERIAL NO

12359039

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Abstract

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Memory devices and methods are described that include a stack of memory dies and an attached logic die. Method and devices described provide for power management of portions of a stack of memory dies. Additional devices, systems, and methods are disclosed.

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Patent Owner(s)

  • MICRON TECHNOLOGY, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jeddeloh, Joe M Shoreview, US 74 1632

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