Method for forming deep silicon via for grounding of circuits and devices, emitter ballasting and isolation
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United States of America Patent
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Aug 11, 2015
Grant Date -
May 2, 2013
app pub date -
Oct 22, 2012
filing date -
Jul 22, 2009
priority date (Note) -
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Abstract
According to an exemplary embodiment, a semiconductor die including at least one deep silicon via is provided. The deep silicon via comprises a deep silicon via opening that extends through at least one pre-metal dielectric layer of the semiconductor die, at least one epitaxial layer of the semiconductor die, and partially into a conductive substrate of the semiconductor die. The deep silicon via further comprises a conductive plug situated in the deep silicon via opening and forming an electrical contact with the conductive substrate. The deep silicon via may include a sidewall dielectric layer and a bottom conductive layer. A method for making a deep silicon via is also disclosed. The deep silicon via is used to, for example, provide a ground connection for power transistors in the semiconductor die.
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