Tucked active region without dummy poly for performance boost and variation reduction
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United States of America Patent
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Aug 11, 2015
Grant Date -
Jan 1, 2015
app pub date -
Sep 15, 2014
filing date -
Oct 5, 2011
priority date (Note) -
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status (Latency Note)
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Abstract
In one embodiment, a semiconductor device is provided that includes a semiconductor substrate including an active region and at least one trench isolation region at a perimeter of the active region, and a functional gate structure present on a portion of the active region of the semiconductor substrate. Embedded semiconductor regions are present in the active region of the semiconductor substrate on opposing sides of the portion of the active region that the functional gate structure is present on. A portion of the active region of the semiconductor substrate separates the outermost edge of the embedded semiconductor regions from the at least one isolation region. Methods of forming the aforementioned device are also provided.
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