Reduced power SERDES receiver using selective adaptation of equalizer parameters in response to supply voltage and operating temperature variations and technique for measuring same
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United States of America Patent
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Aug 11, 2015
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N/A
app pub date -
Jul 21, 2014
filing date -
Jul 21, 2014
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Abstract
Described embodiments include a process and apparatus that takes into account the operating voltage and temperature (VT) variations of a SERDES receiver implemented in an integrated circuit (IC) or system-on-chip (SoC). An analog equalizer (AEQ) adaptation loop and a decision feedback equalizer (DFE) adaptation loop are disabled after the loops have converged or stabilized the parameters of the AEQ and DFE. While the AFE and DFE adaptation loops are disabled, certain monitor coefficients related to signals corrected by the AFE and DFE are adapted and metrics derived therefrom are generated. The metrics are compared to threshold values to check if they have sufficiently changed over time to warrant re-enabling of the AFE and DFE adaptation loops.
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