Floating body memory cell system and method of manufacture

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United States of America Patent

PATENT NO 9111800
APP PUB NO 20110007541A1
SERIAL NO

12888020

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Abstract

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A plurality of integrated circuit features are provided in the context of an array of memory cells including a plurality of word lines and a plurality of bit lines. Each memory cell includes a floating body or is volatile memory. The aforementioned features may include, among others, an option whereby the foregoing bit lines may be situated below a channel region of corresponding memory cells, etc.

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Patent Owner(s)

  • SANDISK TECHNOLOGIES LLC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Scheuerlein, Roy E Cupertino, US 251 12036

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