Memory controller

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United States of America Patent

PATENT NO 9116825
APP PUB NO 20130332797A1
SERIAL NO

13910138

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A memory controller is provided. The memory controller includes a memory interface and an encoding module. The memory interface is configured to couple to a memory chip. The encoding module is coupled to the memory interface and includes a shared memory and a parity generation module. The parity generation module is coupled to the shared memory. The parity generation module reads at least one basic vector from the shared memory, determines a dimension of the at least one basic vector, generates a generation matrix according to the at least one basic vector, converts a raw data into a codeword through the generation matrix, and stores the codeword into the memory chip through the memory interface.

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Patent Owner(s)

  • VIA TECHNOLOGIES, INC.

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chung, Ming-Han New Taipei, TW 3 11

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