Pinch-off control of gate edge dislocation

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United States of America Patent

PATENT NO 9117844
APP PUB NO 20140220757A1
SERIAL NO

14245215

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Abstract

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A method of manufacturing a semiconductor device includes providing a substrate having a gate stack, and performing a pre-amorphous implantation (PAI) process to form an amorphized region on the substrate. The method also includes performing an annealing process to recrystallize the amorphized region after the stress film is formed. The annealing process includes a preheat at a temperature in a range from about 400° C. to about 550° C. and an annealing temperature equal to or greater than about 900° C., and the annealing process recrystallizes the amorphized region.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD8 LI-HSIN RD 6 HSINCHU SCIENCE PARK HSINCHU 300-78

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Tsai, Chun Hsiung Xinpu Township, TW 214 3859
Wang, Tsan-Chun Hsinchu, TW 74 1004

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