Cross-point diode arrays and methods of manufacturing cross-point diode arrays
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United States of America Patent
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Aug 25, 2015
Grant Date -
Jun 19, 2014
app pub date -
Feb 24, 2014
filing date -
Dec 10, 2009
priority date (Note) -
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Abstract
Methods of forming an array of memory cells and memory cells that have pillars. Individual pillars can have a semiconductor post formed of a bulk semiconductor material and a sacrificial cap on the semiconductor post. Source regions can be between columns of the pillars, and gate lines extend along a column of pillars and are spaced apart from corresponding source regions. Each gate line surrounds a portion of the semiconductor posts along a column of pillars. The sacrificial cap structure can be selectively removed to thereby form self-aligned openings that expose a top portion of corresponding semiconductor posts. Individual drain contacts formed in the self-aligned openings are electrically connected to corresponding semiconductor posts.
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