Semiconductor device with single-event latch-up prevention circuitry

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United States of America Patent

PATENT NO 9123545
APP PUB NO 20140167102A1
SERIAL NO

14188461

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Abstract

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A semiconductor device includes a parasitic silicon-controlled rectifier (SCR) and a first transistor. The parasitic SCR includes a parasitic pnp bipolar junction transistor (BJT) and a parasitic npn BJT. The first transistor is coupled between a first power supply node and an emitter of the parasitic pnp BJT. The first transistor includes a first terminal coupled to the first power supply node, a second terminal coupled to the emitter of the parasitic pnp BJT, and a control terminal. The first transistor is not positioned between a base of the pnp BJT and the first power supply node. The first transistor limits current conducted by the parasitic pnp BJT following a single-event latch-up (SEL) event.

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Patent Owner(s)

  • NXP USA, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Burnett, James D Austin, US 59 1307
Garni, Brad J Austin, US 8 64
Liston, Thomas W Austin, US 12 102
Yang, Jianan Austin, US 15 121

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