3D semiconductor device and structure with back-bias

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United States of America Patent

PATENT NO 9136153
APP PUB NO 20120248595A1
SERIAL NO

13492395

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Abstract

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A 3D semiconductor device, including: a first layer including first transistors; a first interconnection layer interconnecting the first transistors and includes aluminum or copper; a second layer including second transistors; where the second transistors are aligned to the first transistors with a less than 40 nm alignment error, and where the second layer is overlying the first interconnection layer, and where at least one of the second transistors has a back-bias structure designed to modify the performance of at least one of the second transistors.

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Patent Owner(s)

  • MONOLITHIC 3D INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Beinglass, Israel Sunnyvale, US 60 2993
Cronquist, Brian San Jose, US 284 3809
Lim, Paul Fremont, US 12 704
Or-Bach, Zvi San Jose, US 534 17764
Sekar, Deepak C San Jose, US 220 3440
Wurman, Ze'ev Palo Alto, US 18 2314

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