Generating a fast 3x multiplicand term for radix-8 booth multiplication
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United States of America Patent
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Sep 29, 2015
Grant Date -
Dec 4, 2014
app pub date -
May 28, 2013
filing date -
May 28, 2013
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Abstract
A 3× circuit for partial product generation used in a radix-8 multiplier receiving only a single multiplicand input. Rather than providing 2-inputs to the adder (a 2× of multiplicand and the multiplicand itself), the new 3× circuit uses the multiplicand as the only input. Thus, in terms of connections at the multiplier circuit level, only one bus is required to connect to the input of the new 3× circuit. The 3× generation adder circuit further operates at a reduced number of logic levels and speeds up the critical path by taking advantage of the repetition and fixed spatial separation of the bits for the adder inputs.
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