Through silicon via structure, method of formation, and integration in semiconductor substrate
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United States of America Patent
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Sep 29, 2015
Grant Date -
Apr 11, 2013
app pub date -
Mar 8, 2012
filing date -
Oct 7, 2011
priority date (Note) -
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Abstract
Various implementations of through silicon vias with pinched off regions are disclosed. A semiconductor substrate includes a plurality of the through silicon vias disposed in the substrate and extending from a top surface of the substrate to a bottom surface of the substrate. A conductive filler is disposed within each of the plurality of through silicon vias, each of the plurality of through silicon vias having a hollow center which reduces thermal stress in the semiconductor substrate. The plurality of through silicon vias also have pinched off regions at the bottom and/or the top portions of the through silicon vias, which prevent contamination during processing of the semiconductor substrate.
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