Yield enhancement for stacked chips through rotationally-connecting-interposer
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United States of America Patent
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Oct 6, 2015
Grant Date -
Jun 14, 2012
app pub date -
Feb 16, 2012
filing date -
Oct 6, 2009
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Abstract
A set of first substrate and second substrate are manufactured with a built-in N-fold rotational symmetry around the center axis of each substrate, wherein N is an integer greater than 1. A set of N different interposers is provided such that an i-th interposer provides electrical connection between the first substrate and the second substrate with a rotational angle of (i−1)/N×2π. The first and second substrates are tested with each of the N different interposers therebetween. Once the rotational angle that provides the highest stacked chip yield is determined, the first and the second substrates can be bonded with an azimuthal rotation that provides the highest stacked chip yield.
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