Fast settling mixed signal phase interpolator with integrated duty cycle correction
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United States of America Patent
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Nov 3, 2015
Grant Date -
Sep 3, 2015
app pub date -
Feb 28, 2014
filing date -
Feb 28, 2014
priority date (Note) -
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Abstract
Described is an apparatus which comprises: a current steering digital-to-analog converter (DAC) to receive a digital bus to control current steering; a switch capacitor network to integrate currents from the DAC, the switch capacitor network having switches which are controllable by a plurality of digital clock signals; an output stage to compare the integrated currents against at least two threshold voltages and to generate an output signal; and a duty cycle corrector (DCC) operable to adjust the at least two threshold voltages to modify duty cycle of the output signal.
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