Adaptive real-time power and performance optimization of multi-core processors
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United States of America Patent
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Nov 17, 2015
Grant Date -
Jan 23, 2014
app pub date -
Sep 30, 2013
filing date -
Nov 28, 2007
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Abstract
An apparatus, method, and program product for optimizing core performance and power in a multi-core processor. The apparatus includes a multi-core processor coupled to a clock source providing a clock frequency to one or more cores, an independent power supply coupled to each core for providing a supply voltage to each core and a Phase-Locked Loop (PLL) circuit coupled to each core for dynamically adjusting the clock frequency provided to each core. The apparatus further includes a controller coupled to each core and being configured to collect performance data and power consumption data measured for each core and to adjust, using the PLL circuit, a supply voltage provided to a core, such that, the operational core frequency of the core is greater than a specification core frequency preset for the core and, such that, core performance and power consumption is optimized.
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