Non-volatile memory device having 3D memory cell array with improved wordline and contact layout
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United States of America Patent
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Nov 17, 2015
Grant Date -
Oct 2, 2014
app pub date -
Sep 4, 2013
filing date -
Mar 26, 2013
priority date (Note) -
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Abstract
According to one embodiment, a semiconductor memory device includes a semiconductor substrate, a memory cell array including a plurality of stacked memory cells, a plurality of first wirings electrically connected to the plurality of memory cells, a plurality of first contacts electrically connected to part of the plurality of first wirings and arranged in a first direction parallel to the semiconductor substrate, a plurality of second contacts electrically connected to part of the plurality of first wirings and arranged in the first direction alternately with the first contacts, a plurality of third contacts electrically connected to the first contacts and displaced from the first contacts in the first direction, and a plurality of fourth contacts electrically connected to the second contacts and displaced from the second contacts in a second direction perpendicular to the first direction.
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