Methods and apparatus for digital host-lock mode in a transceiver
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United States of America Patent
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Nov 17, 2015
Grant Date -
Nov 1, 2012
app pub date -
Apr 29, 2011
filing date -
Apr 29, 2011
priority date (Note) -
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Abstract
Methods and apparatus are provided for implementing a digital host-lock mode in a transceiver. The transmitter portion of a transceiver is synchronized to a recovered clock generated by the receiver portion of the transceiver by applying a receiver input signal to a clock and data recovery system in the receiver portion to generate the recovered clock and a frequency offset value. The frequency offset value comprises a digital word indicating a frequency offset between the recovered clock and the receiver input signal. A transmit clock is generated in the transmitter portion that is substantially synchronized to the recovered clock by applying the digital word to a clock signal generator.
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