Sub-sector wear leveling in memories

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United States of America Patent

PATENT NO 9195590
APP PUB NO 20150067232A1
SERIAL NO

14013867

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Abstract

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Methods and memories for wear leveling by sub-sectors of a block are provided. In one such method, data are transferred from a first block of the memory to a second block of the memory, excluding a sub-sector of the first block that is to be erased, logical addresses for the first block and the second block are swapped with each other, the first block is erased, data are transferred from a third block to the first block, logical addresses for the first block and the third block are swapped with each other, and the third block is erased.

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Patent Owner(s)

  • MICRON TECHNOLOGY, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cabrera, Anthony R Folsom, US 4 18
Fontana, Marco Giovanni Milan, IT 8 27
Kreifels, Gerald A El Dorado Hills, US 2 14
Montanaro, Massimo Cava Manara, IT 19 132

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