Selective laser annealing process for buried regions in a MOS device
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Nov 24, 2015
Grant Date -
Oct 31, 2013
app pub date -
Dec 19, 2011
filing date -
Dec 19, 2011
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Laser anneal to melt regions of a microelectronic device buried under overlying materials, such as an interlayer dielectric (ILD). Melting temperature differentiation is employed to selectively melt a buried region. In embodiments a buried region is at least one of a gate electrode and a source/drain region. Laser anneal may be performed after contact formation with contact metal coupling energy into the buried layer for the anneal.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully