Extended main memory hierarchy having flash memory for page fault handling
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United States of America Patent
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-
Dec 8, 2015
Grant Date -
Dec 30, 2010
app pub date -
Jun 29, 2009
filing date -
Jun 29, 2009
priority date (Note) -
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Abstract
A computer system with flash memory in the main memory hierarchy is disclosed. In an embodiment, the computer system includes at least one processor, a memory management unit coupled to the at least one processor, and a random access memory (RAM) coupled to the memory management unit. The computer system may also include a flash memory coupled to the memory management unit, wherein the computer system is configured to store at least a subset of a plurality of pages in the flash memory during operation. Responsive to a page fault, the memory management unit may determine, without invoking an I/O driver, if a requested page associated with the page fault is stored in the flash memory and further configured to, if the page is stored in the flash memory, transfer the page into RAM.
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