Compliant dielectric layer for semiconductor device
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United States of America
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Dec 22, 2015
Issued Date -
N/A
app pub date -
Jan 3, 2014
filing date -
Jan 3, 2014
priority date (Note) -
Withdrawn
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Abstract
Systems, apparatuses, and methods provided for semiconductor devices and integrated circuit (IC) packages that include compliant dielectric layers. In a through silicon via interposer or substrate, a compliant dielectric material may be added to a surface of silicon material body to form a compliant dielectric layer. The compliant dielectric layer provides a thermal buffer and a stress buffer for a resulting IC package. The compliant dielectric material may be selected such that the coefficient of thermal expansion of the compliant dielectric material approximately matches the coefficient of thermal expansion of the circuit board on which the IC package is mounted. The compliant dielectric material may be selected such that it has a deformability that is greater than the silicon material body. Multiple sub-layers of compliant dielectric material may be used.
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