Vertical TFT with tunnel barrier

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United States of America Patent

PATENT NO 9230985
SERIAL NO

14515054

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Abstract

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A vertically oriented thin film transistor (TFT) having a tunnel barrier is disclosed. The tunnel barrier may be formed from a dielectric such as silicon oxide or hafnium oxide. The vertically oriented TFT selection device with tunnel barrier may serve as a selection device in a 3D memory array. The vertically oriented TFT may be used to connect/disconnect a global bit line to/from a vertical bit line in a 3D memory array. The vertically oriented TFT may be used to connect/disconnect a source line to/from a channel of a vertical NAND string in a 3D memory array. A vertical TFT with tunnel barrier has a high breakdown voltage, low leakage current, and high on current. The tunnel barrier can be at the top junction or bottom junction of the TFT.

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Patent Owner(s)

  • SANDISK TECHNOLOGIES LLC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Tim Santa Clara, US 12 137
Rabkin, Peter Cupertino, US 142 3205
Wu, Ming-Che San Jose, US 62 490

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