Multiple retry reads in a read channel of a memory
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United States of America Patent
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Jan 12, 2016
Grant Date -
Jun 11, 2015
app pub date -
Dec 20, 2013
filing date -
Dec 10, 2013
priority date (Note) -
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Abstract
An apparatus having a circuit and a decoder is disclosed. The circuit is configured to (i) adjust an initial one of a plurality of reference voltages in a read channel of a memory by shifting the initial reference voltage an amount toward a center of a window and (ii) read a codeword from the memory a number of times. The window bounds a sweep of the reference voltages. Each retry of the reads uses a respective reference voltage from a pattern of the reference voltages. The pattern is symmetrically spaced about the initial reference voltage. The pattern fits in the window. The decoder is configured to generate read data by performing an iterative decoding procedure on the codeword based on the reads.
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