System for efficient caching of swap I/O and/or similar I/O pattern(s)
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United States of America Patent
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Jan 19, 2016
Grant Date -
Jun 25, 2015
app pub date -
Jan 1, 2014
filing date -
Dec 19, 2013
priority date (Note) -
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status (Latency Note)
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Abstract
An apparatus comprising a memory and a controller. The memory may be configured to (i) implement a cache and (ii) store meta-data. The cache may comprise one or more cache windows. Each of the one or more cache windows comprises a plurality of cache-lines configured to store information. The controller is connected to the memory and configured to (A) process normal read/write operations in a first mode and (B) process special read/write operations in a second mode by (i) tracking a write followed by read condition on each of said cache windows and (ii) discarding data on the cache-lines associated with the cache windows after completion of the write followed by a read condition on the cache-lines.
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