Semiconductor device and method of stacking semiconductor die in mold laser package interconnected by bumps and conductive vias

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 9252032
APP PUB NO 20120299174A1
SERIAL NO

13566872

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Abstract

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A semiconductor wafer contains a plurality of first semiconductor die. The semiconductor wafer is mounted to a carrier. A channel is formed through the semiconductor wafer to separate the first semiconductor die. A second semiconductor die is mounted to the first semiconductor die. An encapsulant is deposited over the carrier and first semiconductor die and into the channel while a side portion and surface portion of the second semiconductor die remain exposed from the encapsulant. A first conductive via is formed through the encapsulant in the channel. A second conductive via is formed through the encapsulant over a contact pad of the first semiconductor die. A conductive layer is formed over the encapsulant between the first and second conductive vias. An insulating layer is formed over the conductive layer and encapsulant. The carrier is removed. An interconnect structure is formed over the first conductive via.

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Patent Owner(s)

  • STATS CHIPPAC PTE. LTE.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Choi, DaeSik Seoul, KR 93 2113
Ko, WonJun Kyungki-Do, KR 19 219
Yun, JaEun Kyounggi, KR 9 134

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