Dual shallow trench isolation liner for preventing electrical shorts

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 9252052
APP PUB NO 20140084372A1
SERIAL NO

14096563

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Abstract

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A shallow trench is formed to extend into a handle substrate of a semiconductor-on-insulator (SOI) layer. A dielectric liner stack of a dielectric metal oxide layer and a silicon nitride layer is formed in the shallow trench, followed by deposition of a shallow trench isolation fill portion. The dielectric liner stack is removed from above a top surface of a top semiconductor portion, followed by removal of a silicon nitride pad layer and an upper vertical portion of the dielectric metal oxide layer. A divot laterally surrounding a stack of a top semiconductor portion and a buried insulator portion is filled with a silicon nitride portion. Gate structures and source/drain structures are subsequently formed. The silicon nitride portion or the dielectric metal oxide layer functions as a stopping layer during formation of source/drain contact via holes, thereby preventing electrical shorts between source/drain contact via structures and the handle substrate.

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Patent Owner(s)

  • COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES;INTERNATIONAL BUSINESS MACHINES CORPORATION;STMICROELECTRONICS, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Doris, Bruce B Slingerlands, US 796 13211
Khare, Prasanna Schenectady, US 56 694
Liu, Qing Guilderland, US 474 5037
Loubet, Nicolas Guilderland, US 244 2037
Ponoth, Shom Clifton Park, US 240 3538
Vinet, Maud Grenoble, FR 97 1605

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