Memory system and method of controlling memory system

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United States of America Patent

PATENT NO 9252810
APP PUB NO 20150236716A1
SERIAL NO

14445229

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Abstract

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According to one embodiment, a controller writes first write data transferred from a first buffer and code data for second write data different from the first write data, the code data being transferred from a second buffer, in parallel to a plurality of physical pages corresponding to a first logical page. The controller writes code data for the first write data to a physical page corresponding to a second logical page, the second logical page being next to the first logical page, at a time of write to the nonvolatile memory following the write of the first write data and the code data for the second write data.

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Patent Owner(s)

  • KABUSHIKI KAISHA TOSHIBA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fukuda, Tohru Nishitokyo, JP 14 64

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