Inverse PCP flow remapping for PFC pause frame generation

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United States of America Patent

PATENT NO 9258256
SERIAL NO

14321762

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Abstract

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An overflow threshold value is stored for each of a plurality of virtual channels. A link manager maintains, for each virtual channel, a buffer count. If the buffer count for a virtual channel is detected to exceed the overflow threshold value for a virtual channel whose originating PCP flows were merged, then a PFC (Priority Flow Control) pause frame is generated where multiple ones of the priority class enable bits are set to indicate that multiple PCP flows should be paused. For the particular virtual channel that is overloaded, an Inverse PCP Remap LUT (IPRLUT) circuit performs inverse PCP mapping, including merging and/or reordering mapping, and outputs an indication of each of those PCP flows that is associated with the overloaded virtual channel. Associated physical MAC port circuitry uses this information to generate the PFC pause frame so that the appropriate multiple enable bits are set in the pause frame.

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Patent Owner(s)

Patent OwnerAddress
NETRONOME SYSTEMS INC5201 GREAT AMERICA PARKWAY TECHMART CENTER SUITE 240 SANTA CLARA CA 95054

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lamb, Joseph M Hopkinton, US 14 228

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