Hybrid cache state and filter tracking of memory operations during a transaction
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United States of America Patent
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Mar 29, 2016
Grant Date -
Jan 2, 2014
app pub date -
Jun 28, 2012
filing date -
Jun 28, 2012
priority date (Note) -
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Abstract
In one embodiment, a cache memory can store a plurality of cache lines, each including a write-set field to store a write-set indicator to indicate whether data has been speculatively written during a transaction of a transactional memory, and a read-set field to store a plurality of read-set indicators each to indicate whether a corresponding thread has read the data before the transaction has committed. A compression filter associated with the cache memory includes a first filter storage to store a representation of a cache line address of a cache line read by a first thread of threads before the transaction has committed. Other embodiments are described and claimed.
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